Questions tagged [semiconductor-process-technology]

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When Intel / AMD choose their Nanometer Processes, why were the specific numbers, 5, 7, 10, 14, 22, 32, 45, etc chosen?

When looking at the roadmaps for the CPU manufacturing process https://wccftech.com/intel-expects-launch-10nm-2017/ Semiconductor Process Technology Year 10 µm 1971 6 µm 1974 3 µm 1977 1.5 µm 1981 1 µm 1984 800 nm 1987 600 nm 1990 350 nm 1993 250 nm…
Anon
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Why are microprocessors made using silicon and not germanium?

I heard that microprocessors are usually made using silicon, yet germanium has a better conductive state. Why isn't germanium not chosen instead, taking to account that better conductors provide better efficiency?
kopon stanley
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What are the ways in which semiconductor-grade neon is critical for manufacturing?

This is a question about material use specifically in semiconductor manufacturing. CNN's Ukraine halts half of world's neon output for chips, clouding outlook begins: Ukraine's two leading suppliers of neon, which produce about half the world's…
uhoh
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Why do silicon wafers look rainbow colored?

. Image taken from Can somebody identify this 12" silicon wafer? So this silicon wafer looks multicolored (and beautiful). But how does it get multicolored like a rainbow? What is the reason for this phenomenon?
Shashank V M
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How is the asymmetry of a Schottky diode obtained?

A Schottky diode is constructed with two metal conductors bonded to a doped semiconductor. One of the metal-semiconductor junctions is a Schottky contact, and the other metal-semiconductor junction is an Ohmic contact. If the doping in the…
Math Keeps Me Busy
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Why are drain and source not actually perfectly symmetric?

In textbook treatments, one has that the source and drain of a MOSFET are completely symmetrical and therefore interchangeable -- the distinction is only made by which is at a higher voltage in the circuit in which the MOSFET is used. Gray and Meyer…
EE18
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Is there any specific application for an indirect band gap semiconductor?

I know that direct band gap semiconductors are very attractive for optical emission, and even though indirect band gap are used as well, I keep wondering: is there any technology that specifically makes use of an indirect bandgap semiconductor? In…
Bidon
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How does one manufacture a P-N junction?

When I read a physics textbook about a P-N junction, it will tell me that you connect a P-doped semiconductor to an N-doped semiconductor, and you form a depletion region. From what I know about silicon wafer manufacturing, wafer producers will make…
Roy
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Die Size and IC Package

I would like to gain a better understanding of IC package lead inductance and on-die capacitance. For a physically larger IC chip, would the on-die capacitance generally be higher due to the reduced distance between the pad on the die and the…
Potionless
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MOSFET Common-Source Stage with Resistive Load

If the \$V_\text{GS}\$ is constant, the graph, drain current is as shown. If \$V_\text{GS}\$ varies, the drain current is as shown My question is, what actually is a saturion region for MOSFET? Why does in 2 , the current \$V_\text{DD}/R_\text{D}\$…
user411653
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Why do JFET use buried channels?

All sketches of JFET construction that provide an actual 3D impression suggest that the channel is buried, e.g. here . I imagine that the formation of such a channel geometry requires at least two implantation steps. Assuming n-channel in a…
tobalt
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Suggested Configuration of Sputtering System?

hopefully this is in the right section, a lot of electrical engineers work in semiconductors. I have an old hummer II desktop sputter coater I am trying to make use of. The documentation of something this old is pretty scant. I have a manual, but…
Matt
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Ambiguity of the "intrinsic" layer in a PIN diode

I'm having trouble understanding the fundamental makeup of large PIN diodes, specifically those used in radiation detection devices. For example, high purity germanium (HPGe) detectors are often referred to as large PIN diodes, where the intrinsic,…
thegreatemu
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What is the current state of the art design rule for SiC VLSI? Technological impediments to making a SiC microcontroller for a Venus lander at 460 °C?

A sub-discussion below Is there any demonstrated or even proposed technology that can sterilize a spacecraft with 100% certainty and yet leave it electronically functional? in Space Exploration SE involves the speed at which VLSI process development…
uhoh
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Can drain and source length be smaller than minimum channel length in CMOS technology?

I know the channel width can't be smaller, but what about drain and source? Say, in 0.18u technology, what would be a typical drain/source length?
MNaz
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